SA 20.2: A Semi-Digital DLL with Unlimited Phase Shift Capability and 0.08-400MHz Operating Range

Delay-locked loops are an attractive alternative to VCO-based phase-locked loops due to their simpler design and inherent stability [1-3]. The primary disadvantage of conventional DLLs is limited phase range, that limits their application to mesochronous environments. This dual DLL architecture combines several techniques to achieve unlimited phase shift, low jitter and large operating range. The desired delay is generated by phase interpolation, but the use of more tightly spaced 30° edges results in lower noise sensitivity [2]. Owing to its digital control but avoiding the use of a VCO, the DLL can operate with only periodic calibration [4]. Finally, by utilizing self-biasing it achieves large operating range and low jitter [3].